The invention relates to a semiconductor device of the RESURF type with a lateral DMOST (LDMOST), comprising a semiconductor body of substantially a first conductivity type and a surface zone which adjoins a surface, which is of a second conductivity type opposed to the first, and which forms a pn junction with the semiconductor body at the side remote from the surface, which LDMOST comprises a back gate region in the form of a surface zone of the first conductivity type provided in the surface region with a source region in the form of a surface zone of the second conductivity type in the back gate region and a channel region defined between the source region and an edge of the back gate region, and a drain region in the form of a surface zone of the second conductivity type which is at a distance from the back gate region, while a number of breakdown voltage raising zones of the first conductivity type are provided so as to adjoin the surface between the back gate and the drain region.
A device of the kind mentioned in the opening paragraph is known from the article "A Versatile 700-1200-V IC Process for Analog and Switching Applications" in "IEEE Trans. on Electron Devices, vol. 38, no. 7, July 1991, pp. 1582-1589"which is particularly suitable as a switching element for high voltages. In the known device, an n-channel LDMOST lies in the surface region. The surface region is formed by an n-type epitaxial layer on a semiconductor body formed by a p-type semiconductor substrate, where the surface region is laterally bounded by a p-type separation region which extends from the surface down to the substrate. A p-type back gate and n-type source and drain regions are provided in the surface region. Gate oxide is locally present on the surface above the back gate. Electric conductors are provided, forming a source/back gate connection and a gate electrode, above the source region, the back gate region and the gate oxide. The source and back gate regions are short-circuited. In addition, the drain region is provided with an electric conductor as a drain connection. The so-called RESURF principle is used for rendering the semiconductor device suitable for high voltages, i.e. the net doping of the surface region in atoms per unit area is so low that, when a voltage is applied across the first pn junction, the surface region is at least locally depleted over its entire thickness before breakdown takes place. A target value for net doping in RESURF is approximately 1.times.10.sup.12 atoms/cm.sup.2. In the known semiconductor device, a number of breakdown voltage raising zones are provided between the back gate and the drain region. The breakdown voltage raising zones ensure that the surface region is not only depleted from the first pn junction between substrate and epitaxial layer, but also from pn junctions between the breakdown voltage raising zones and the epitaxial layer in the case of a high voltage at the drain connection. The epitaxial layer is thus depleted from several sides, so that even at a doping concentration of the surface region higher than approximately 1.times.10.sup.12 atoms/cm.sup.2, for example approximately 1.5.times.10.sup.12 atoms/cm.sup.2, the RESURF condition can be satisfied: the epitaxial layer can be entirely depleted at least locally before avalanche breakdown between substrate and back gate occurs. The breakdown voltage raising zones spread the electric field in the surface region during this, so that no high electric fields occur locally.
The channel region is situated at the surface below the gate oxide. Charge carders from the channel region must pass below the breakdown voltage raising zones through the so-called drift region to the drain. A breakdown voltage raising zone which lies too close to the back gate region blocks the charge carriers coming from the channel region. This is why a region between back gate and drain adjoining the surface and the back gate region is kept free from breakdown voltage raising zones in an LDMOST. When the voltage at the drain region increases in an n-channel LDMOST after switching off of the LDMOST, the breakdown voltage raising zones will follow the drain region as regards voltage until punch-through to the pn junction between back gate and surface region charges the breakdown voltage raising zones negatively and the zones are at least partly depleted. Now when the drain voltage drops after switching on of the LDMOST, the breakdown voltage raising zones cannot be discharged through the cut-off pn junctions and remain therefore negatively charged for some time, which is accompanied by a high on-resistance (resistance between drain and source) of the LDMOST, because a portion of the surface region between back gate and drain, the so-called drift region, remains partly depleted. This high on-resistance remains until holes are supplied from the pn junction between the back gate and the surface region, for example, through leakage or punch-through.